http://lists.febo.com/pipermail/time-nuts_lists.febo.com/2010-July/030977.html


[time-nuts] Parts (Mouser) for the PICTIC II
Richard H McCorkle mccorkle at ptialaska.net
Fri Jul 9 17:28:53 EDT 2010


Bob,
I included the option to go with a TTL output for users without a serial
port that might need to feed TTL into an internal USB converter in their
project or to drive a PC port directly with a short cable. Including the
extra pads on the board and the TTL invert flag in the code adds no cost.
But the option of adding appropriate jumpers or components allows TTL
signals of either polarity to be used with a USB converter. I am not
certain of the requirements for the different USB converters that might
be available, but having normal or inverted TTL and RS-232 signals as
options should provide enough flexibility to use a wide variety of USB
converter options. I recommend the MAX232 be installed for normal
serial port use as it will drive longer lines to a PC, with an RS-232 to
USB dongle added as a simple solution if a serial port is not available.

  I socketed all the devices on my board to simplify troubleshooting
and repair should that be required in the future. At the minimum the
PIC should be socketed to simplify reprogramming as new code is
developed. I haven't lost a single 74AC74 input chip in 3 years of
testing but a socket there is also a good idea. The XO and sample
caps should be selected for the application and desired resolution.
Three pads are provided for the sample caps so either 0.1” or 0.2”
lead spacing can be accommodated. Use ceramic NPO/COG caps
of 5% or better tolerance for best results. No additional parts will
be required during calibration.

  The 10M clock XO was selected as the default as many users have a
10M OCXO or GPSDO they may want to use as the counter reference.
In a typical GPS monitoring application where the house 1PPS is
compared  to GPS 1PPS with 1ns resolution the delay will normally
be less than 10us and a 30PPM XO will provide sufficient stability
to return accurate data. Over longer measurement intervals a higher
stability clock would be needed to insure the clock drifted less than
1 cycle over the measurement interval to insure accurate data would
be returned. For faster clocks 3x or 5x tuned multipliers or doublers
can be used to derive the counter clock from a slower source. No
clock conditioning is included on board so for accuracy over longer
measurement intervals an external high-stability TTL clock needs
to be supplied by the user.

  Use of a high stability clock is possible by using an XO for the
interpolator calibration, storing the calibration values in EEPROM,
turning off the AutoCal routine, and switching to the external source
for normal operation. If a faster external source than 10M is available
the XO and sample capacitor values should be chosen to match the
faster external rate you plan to use. The lower stability XO would be
used during initial calibration to insure frequent coincidences between
the inputs and clock as the XO drifts in frequency. As the inputs pass
thru coincidence with the clock the interpolators pass thru their min
and max limits, and the more times they pass thru the limits during a
calibration cycle the more likely the data will correctly reflect those
limits.

  Peak detection of the interpolator data over a long period (> 1 hr)
will capture the min and max limits and can then be used to determine
the offset and span of the interpolators. When a high stability timebase
and high stability sources are used long periods between coincidences
can occur. This could result in improper peak values returned over a
calibration cycle, so the AutoCal routine should either use much longer
calibration intervals to capture the peak limits or be disabled when a
high stability clock is used.

  During setup the peak detector values can be displayed continuously
and can be reset manually after an adjustment to start a new calibration
cycle. Apply two 1PPS inputs to the counter and adjust the gain
trimmers to give identical 800 count p-p spans and the offset trimmers
to center the span in the ADC range. A difference in the channel gains
will introduce an error in the final result, so a close gain match is
desired. The offsets are not as critical but centering the data in the ADC
span will provide a wider range the data can drift over temperature and
age and stay within the ADC span. A series of adjust, reset, sample,
and repeat cycles will be required to get the calibration values in the
ballpark. Allow a full calibration cycle to complete to store the values
determined in EEPROM. The counter will then use the stored values
to correct the data mathematically to remove the offset and adjust the
span for the desired gain. Once the interpolators have been calibrated
the peak detector display and AutoCal routines can be disabled and
the external high stability clock can be selected as the counter
timebase for normal operation.

Richard